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Freescale Semiconductor Technical Data
MPR081 Rev 0, 06/2007
Touch Pad Controller
The MPR081 is a user interface controller which manages a 16-position rotary touch pad. The MPR081 uses an I2C interface to communicate with the host, which configures the operation, and an interrupt to advise the host of status changes. The interrupt output, IRQ, indicates that rotary status has changed since the MPR081 was last read. The maximum interrupt frequency can be limited to sacrifice system response time in favor of power consumption for systems that wake up out of sleep to respond to interrupts. Features * * * * * * * * * * * * * * * * * * * * * * * * 1.8 V to 3.6 V operation 150 A average supply current (all touch pads being monitored) 1 A standby current Supports a 16-position rotary interface Proprietary false touch rejection technology Ongoing pad analysis and detection not reset by EMI events Rotary data changes are delivered from a FIFO for shortest access time IRQ output advises when FIFO has data System can set interrupt behavior as immediate after event, or program a minimum time between successive interrupts Current rotary position is always available on demand for polling-based systems Sounder drive provides audible feedback to simulate mechanical key clicks Digital output (I2C with custom addressing) 16-pin QFN and TSSOP packages -40C to +85C operating temperature range Control Panels Switch Replacements Rotary and Linear Sliders Touch Pads Appliances PC Peripherals Access Controls MP3 Players Remote Controls Mobile Phones ORDERING INFORMATION
Device Name MPR081Q -40C to +85C MPR081EJ 948F (16-Lead TSSOP) Temperature Range Case Number 1679 (16-Lead QFN) 16-Positions Rotary Slider
MPR081
Touch Pad Controller
Bottom View
16-LEAD QFN CASE 1679
16-LEAD TSSOP CASE 948F
Top View
RNE RSE RN RE
Implementations
RST IRQ VDD VSS
RS
MPR081Q
RSW RW RNW
Typical Applications
SDA
RST IRQ VDD VSS SCL SDA AD0 SOUNDER
SOUNDER
SCL
AD0
RN RNE
MPR081EJ
RE RSE RS RSW RW RNW
Figure 1. Pin Connections
(c) Freescale Semiconductor, Inc., 2007. All rights reserved.
Table 1. Absolute Maximum Ratings
Rating Voltage (with respect to VSS) VDD All other pins Operating Temperature Range Storage Temperature Range Symbol -- -0.3 to +3.8 VSS-0.3 to VDD+0.3 TA TSTG -40 to +85 -55 to +150 V V C C Value Unit
Table 2. ESD and Latch-Up Protection Characteristics
Rating Human Body Model Machine Model Charge Device Model Latch-Up Current at TA = 85C Symbol HBM MM CDM -- Value 2000 200 500 100 Unit V V V mA
Table 3. DC Characteristics (Typical Operating Circuit, V+ =1.8 V to 3.6 V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 3.3 V, TA = +25C.)
Characteristic Operating Supply Voltage Standby Current (I2C Interface idle) Input High Voltage SDA, SCL Input Low Voltage SDA, SCL Input Leakage Current SDA, SCL Input Capacitance SDA, SCL Output Low Voltage SDA, IRQ VIH VIL IIH, IIL -- VOL -- -- -- -- IOL = 6 mA 0.7 x VDD -- -- -- -- -- -- 0.025 -- -- -- 0.35 x VDD 1 7 0.5 V V A pF V Symbol V+ I+ Conditions -- SCL and SDA at V+ or GND Min 1.8 TBD Typ Max 3.6 Units V A
Table 4. Interrupt IRQ Timing Characteristics (Typical Operating Circuit, V+ = 1.8 V to 3.6 V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 3.3 V, TA = +25C.)
Characteristic IRQ Reset delay time from STOP IRQ Reset delay time from acknowledge Symbol tIP tIR Conditions CL 100 pF CL 100 pF Min -- -- Typ -- -- Max TBD TBD Units s s
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Table 5. I2C AC Characteristics (Typical Operating Circuit, V+ = 1.8 V to 3.6 V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 3.3 V, TA = +25C.)
Characteristic Serial Clock Frequency Bus Timeout Bus Free Time Between a STOP and a START Condition Hold Time, (Repeated) START Condition Repeated START Condition Setup Time STOP Condition Setup Time Data Hold Time Data Setup Time SCL Clock Low Period SCL Clock High Period Rise Time of Both SDA and SCL Signals, Receiving Fall Time of Both SDA and SCL Signals, Receiving Fall Time of SDA Transmitting Pulse Width of Spike Suppressed Capacitive Load for Each Bus Line Symbol fSCL FTIMEOUT tBUF tHD, STA tSU, STA tSU, STO tHD, DAT tSU, DAT tLOW tHIGH tR tF tF.TX tSP Cb Min -- -- 1.3 0.6 0.6 0.6 -- 100 1.3 0.7 -- -- -- -- -- Typ -- 31.25 -- -- -- -- -- -- -- -- 20+0.1Cb 20+0.1Cb 20+0.1Cb 50 -- Max 400 -- -- -- -- -- 0.9 -- -- -- 300 300 250 -- 400 Units kHz ms s s s s s ns s s ns ns ns ns pF
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Table 6. Pin Description
Pin 1 2 3 4 5 6 7 8 9 - 16 PAD Name RST IRQ VDD VSS SCL SDA AD0 SOUNDER RNW, RW, RSW, RS, RSE, RE, RNE, RN Exposed Pad Function Reset Input. Active low clears the 2-wire interface and puts the device in the same condition as power-up reset. Interrupt Output. IRQ is the active-low open-drain interrupt output signalling new events. Positive Supply Voltage Bypass VDD to VSS with a 0.1F ceramic capacitor Ground IC-Compatible Serial Clock Input IC-Compatible Serial Data I/O Address input 0. Connect to VSS to select device slave address 0x4C. Connect to VDD to select device slave address 0x4D. Sounder driver output. Connect a piezo-ceramic sounder from this output to ground. Output is push-pull. Rotary Touch Inputs. Connect the 8 inputs to a 16-position rotary sensor. Exposed Pad on Package Underside (QFN only). Connect to VSS.
RNE
RSE
RN
RE
RST IRQ
1 2 3 4 5 6 7 8
16 15 14
RN RNE RE RSE RS RSW RW RNW
16
RST IRQ VDD VSS
15
14
13 12 RS 11 RSW 10 RW 9
RNW
1 2 3 4 5
SCL
VDD VSS SCL SDA AD0 SOUNDER
MPR081Q
MPR081EJ
13 12 11 10 9
6
SDA
7
AD0
8
SOUNDER
Figure 2. MPR081 Pinout
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CLEAR SDA SCL RST AD0 I2C SERIAL INTERFACE
EMI BURST/NOISE REJECT FILTER
RATE
CAPACITANCE MEASUREMENT A.F.E.
SET
CONFIGURATION AND STATUS REGISTERS
IRQ
INTERRUPT CONTROLLER
MAGNITUDE COMPARATOR AND RECALIBRATOR
MASKS
NNW NW NWW W SWW SW SSW
N
NNE NE NEE E SEE SE
ROTARY POSITION
ROTARY POSITION DECODER
8
8
8
S
SSE
SOUNDER
SOUNDER CONTROLLER
16 POSITION ROTARY
Figure 3. Internal Block Diagram
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DETAILED DESCRIPTION
FUNCTIONAL OVERVIEW The MPR081user interface controller monitors various combinations of capacitive touch pads, capacitive sliders, capacitive rotaries, and mechanical keys. The device includes a piezo buzzer driver which generates key click sounds to provide audible feedback of pad touches and/or Table 7. MPR08 Family Overview
Product MPR081 MPR082
2
key presses. The MPR081 also uses a standardized user register set to configure the part on power up, and to read pad, slider and key status. The commonality between products in the MPR08 family of controllers simplifies migration between parts.
Bus I C with RST I2C with RST
Sounder Yes Yes
Rotary Slider 16-Positions --
Touch Pad Array -- 20 Pads(1)
Main Attribute Highest resolution rotary Two independent arrays of 10 touch pads
1. The 20 pads are implemented by two independent arrays of 10 touch pads.
A quick word on terminology: - A mechanical keyswitch is a switch containing, at its simplest, two contacts which have either a high (>10 M) or a low resistance (<10 k) between them depending on switch position. Momentary push switches normally are low resistance when pressed. Latching switches (such as slide switches) provide high resistance in one position, low resistance in the other. - A capacitive touch pad is a contactless 'key' which detects the presence or absence of a finger. The raw detection output is a single bit giving touch condition. - A capacitive rotary is a group of touch pads arranged in a ring for which not only the presence or absence of a finger is detected, but also the position of a finger along the circumference of the rotary. - A capacitive slider is an elongated touch pad for which not only the presence or absence of a finger is detected, but also the position of a finger along the length of the slider. The raw detection output is a single bit giving touch condition, plus a multi-bit word for position. A typical application is a volume control, where one end of the slider corresponds to minimum volume and the other end to maximum. - A full pad is a touch pad whose conductive area is connected to one electrode of the touch controller and ground.
-
-
- -
-
A split pad is a touch pad whose conductive area is connected to more than one electrode of the touch controller. For the MPR08 family, a split pad is always connected to two electrodes and typically looks like a pair of interlaced fingers. A pad array is a collection of full and split pads interconnected to each other and a number of electrode lines. The number of pads available in a pad array with N electrode lines using full and two-electrode split pads is sum(1 to N), made up of N full pads and sum(1 to (N-1)) split pads. The MPR082 uses two sets of 4 electrode lines and, therefore, each 4-electrode pad array has a capability of 4 full pads and sum(1 to 3) or 1+2+3 = 6 split pads, and a total pad count of sum(1 to 4) or 1+2+3+4 = 10 full plus split pads. A pad array with n key lockout will only report one touch at a time. Multiple simultaneous touches are ignored. A pad array with 2 key rollover ignores further pads after touching a first pad. If a pad is touched and held, and then a second pad is touched, the second pad is ignored. If the first pad is released while the second pad is still touched, then the second pad will be reported as a new touch. A pad array with n-key rollover allows any number of pads will be detected as pressed in succession or simultaneously without requiring any previous pads to be released first.
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SERIAL INTERFACE
SERIAL-ADDRESSING The MPR081 operates as a slave that sends and receives data through an I2C 2-wire interface. The interface uses a serial data line (SDA) and a serial clock line (SCL) to achieve bi-directional communication between master(s) and slave(s). A master (typically a microcontroller) initiates all data transfers to and from the MPR081 and generates the SCL clock that synchronizes the data transfer.
Figure 4. 2-Wire Serial Interface Timing Details The MPR081 SDA line operates as both an input and an open-drain output. A pull-up resistor, typically 4.7 k, is required on SDA. The MPR081 SCL line operates only as an input. A pull-up resistor, typically 4.7 k, is required on SCL if there are multiple masters on the 2-wire interface, or if the master in a single-master system has an open-drain SCL output. Each transmission consists of a START condition (Figure 5) sent by a master, followed by the MPR081's 7-bit slave address plus R/W bit, a register address byte, one or more data bytes, and finally a STOP condition.
Figure 5. Start and Stop Conditions START AND STOP CONDITIONS Both SCL and SDA remain high when the interface is not busy. A master signals the beginning of a transmission with a START (S) condition by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave, it issues a STOP (P) condition by transitioning SDA from low to high while SCL is high. The bus is then free for another transmission. BIT TRANSFER One data bit is transferred during each clock pulse (Figure 6). The data on SDA must remain stable while SCL is high.
Figure 6. Bit Transfer MPR081 Sensors Freescale Semiconductor 7
ACKNOWLEDGE The acknowledge bit is a clocked 9th bit (Figure 7) which the recipient uses to handshake receipt of each byte of data. Thus each byte transferred effectively requires 9 bits. The master generates the 9th clock pulse, and the recipient pulls down SDA during the acknowledge clock pulse, such that the
SDA line is stable low during the high period of the clock pulse. When the master is transmitting to the MPR081, the MPR081 generates the acknowledge bit because the MPR081 is the recipient. When the MPR081 is transmitting to the master, the master generates the acknowledge bit because the master is the recipient.
Figure 7. Acknowledge THE SLAVE ADDRESS The MPR081 has a 7-bit long slave address (Figure 5). The bit following the 7-bit slave address (bit eight) is the R/W bit, which is low for a write command and high for a read command. The MPR081 has a factory set IC slave address which is normally 1001100 (0x4C). Contact the factory to request a different I2C slave address, which is available in the range 0001000 to 1110111 (0x08 to 0xEF).
Figure 8. Slave Address The MPR081 monitors the bus continuously, waiting for a START condition followed by its slave address. When a MPR081 recognizes its slave address, it acknowledges and is then ready for continued communication. MESSAGE FORMAT FOR WRITING THE MPR081 A write to the MPR081 comprises the transmission of the MPR081's keyscan slave address with the R/W bit set to 0, followed by at least one byte of information. The first byte of information is the command byte. The command byte determines which register of the MPR081 is to be written by the next byte, if received. If a STOP condition is detected after the command byte is received, then the MPR081 takes no further action (Figure 9) beyond storing the command byte. Any bytes received after the command byte are data bytes.
Figure 9. Command Byte Received
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Any bytes received after the command byte are data bytes. The first data byte goes into the internal register of the MPR081 selected by the command byte (Figure 10).
Figure 10. Command and Single Data Byte Received pointer generally auto-increments after each data byte is read using the same rules as for a write (Table 11). Thus, a read is If multiple data bytes are transmitted before a STOP initiated by first configuring the MPR081's command byte by condition is detected, these bytes are generally stored in performing a write (Figure 9). The master can now read 'n' subsequent MPR081 internal registers because the consecutive bytes from the MPR081, with the first data byte command byte address generally auto-increments (Table 8). being read from the register addressed by the initialized command byte. When performing read-after-write MESSAGE FORMAT FOR READING THE MPR081 verification, remember to re-set the command byte's address The MPR081 is read using the MPR081's internally stored because the stored command byte address will generally command byte as address pointer, the same way the stored have been auto-incremented after the write (Table 8). command byte is used as address pointer for a write. The
Figure 11. `n' Data Bytes Received OPERATION WITH MULTIPLE MASTERS If the MPR081 is operated on a 2-wire interface with multiple masters, a master reading the MPR081 should use repeated start(s) between the write(s) which sets the MPR081's address pointer, and the read(s) that take the data from the location(s). This is because it is possible for master #2 to take over the bus after master #1 has set up the MPR081's address pointer, but before master #1 has read the data. If master #2 subsequently re-sets the master of the MPR08's address pointer, then master #1's read may be from an unexpected location. DEVICE RESET The reset input RST is an active-low input. When taken low, RST clears any transaction to or from the MPR081 on the serial interface and configures the internal registers to the same state as a power-up reset (Table 9). The MPR081 then waits for a START condition on the serial interface.
CONTROLLING AND READING THE MPR081
REGISTER ORGANIZATION The MPR081 is a peripheral that is controlled and monitored though a small array of internal registers which are accessed through the I2C bus. INITIAL POWER-UP On power-up, the interrupt output IRQ is reset, and IRQ will go high. The registers are reset to the values shown in Table 9. STANDBY MODE When the serial interface is idle, the MPR081 automatically enters standby mode. If any of the features are Figure 12. Master Tick Counter and Pad/Key Input Sampling with Autorepeat used, the operating current rises because the internal timing oscillator is running and toggling counters.
MPR081 Sensors Freescale Semiconductor 9
INTERRUPT CONTROLLER AND IRQ OUTPUT The IRQ pin is an open-drain, latching interrupt output which automatically alerts changes to a user-configurable combination of keyswitches and/or touch pads. IRQ requires an external pullup resistor, which can be connected to any voltage up to VDD. When set active low, IRQ is reset high immediately after the slave address acknowledge of the first subsequent read or write access to the MPR081. If an interrupt causing event occurs during an I2C transmission to the MPR081, the interrupt is not asserted. Instead, it is asserted after the I2C transmission is terminated (by a STOP condition or a repeated START condition), but only if the affected registers were not read during the I2C communication. This avoids unnecessary assertion of the interrupt. An interrupt can be enabled for: * Initial touch (when rotary condition goes from untouched to touched) * Touch release ROTARY TOUCH INTERFACE The rotary interface has to distinguish touch status through varying user conditions (different finger sizes in bare hands or gloves) and environmental conditions (electrical and RF noise, sensor contamination with dirt or moisture). The rotary Table 8. Register Address Map
Register FIFO Fault Rotary Status Rotary Configuration Sensitivity Master Tick Counter Touch Acquisition Sample Rate Sounder Sleep Period Configuration Register Address D15 D14 D13 D12 D11 D10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 1 1 1 0 0 0
circuitry reports status as one of five conditions: rotary untouched, and rotary touched in one of four positions. Normally, the rotary is only touched in one position, ideally near the middle of one of the four pads. If a touch occurs more or less between pads, either the nearest pad will be given or the touch will be ignored depending on exact touch position and finger size. The rotary circuitry interprets multiple simultaneous rotary touches (more than one rotary pad being touched at the same time) as best it can. The scenarios are as follows: 1. Two rotary pads touched at the same time * If the two touched rotary pads are both full or both split, the touches are ignored until one is removed * If one touched rotary pad is full and the other touched rotary pad is split, the full pad position will be reported. * If the full pad touch is removed first, the split pad position now will be reported. 2. First one rotary pad is touched and held, then a second rotary pad is touched and held. * The second touch will be ignored and the first touch will continue to be active. If the first touch is removed while the second pad is still being touched, then the second pad becomes the only touched pad and so is reported.
D9 0 0 1 1 0 1 1 0 0 1
D8 0 1 0 1 1 0 1 0 1 0
Register Address 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09
Auto-Increment Auto-Increment Loop Address 0x00 0x02 0x00 0x04 0x05 0x06 0x07 0x08 0x09 0x00 FIFO FIFO FIFO
Table 9. Power-Up Register Configurations
Register Function FIFO Fault Rotary Status Rotary Configuration Sensitivity Master Tick Counter Power-Up Condition FIFO is empty No faults Rotary is untouched Rotary is enabled, without interrupts, with sounder enabled Level is very sensitive Master tick period is 10 ms Register Address 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 Register Data D7 0 0 0 1 0 0 0 0 0 0 D6 0 0 0 0 0 0 0 0 0 0 D5 0 0 0 0 0 0 0 0 0 0 D4 0 0 0 0 0 0 0 0 0 0 D3 0 0 0 0 0 0 0 0 0 0 D2 0 0 0 0 0 1 1 0 0 0 D1 0 0 0 0 0 0 0 0 0 0 D0 0 0 0 1 0 1 0 1 0 0
Touch Acquisition Sample Rate Touch acquisition sample rate is 5 master tick periods Sounder Sleep Period Configuration Sounder is globally enabled, 10 ms of 1 kHz Sleep mode is disabled Shutdown mode. IRQ is disabled
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Table 10. FIFO Register Format
Register FIFO Register(1) FIFO Status Clear the FIFO. Subsequent reads without any intervening addition(s) to the FIFO will return 1'b0100000 This data is not the last FIFO item. FIFO has not overflowed. This data is not the last FIFO item. FIFO did overflow, discarding the most recent entries. This data is the last FIFO item. FIFO has not overflowed. Subsequent reads without any intervening addition(s) to the FIFO will return 1'b0100000 This data is the last FIFO item. FIFO did overflow, discarding the most recent entries (FIFO overflow flag will now be cleared). Subsequent reads without any intervening addition(s) to the FIFO will return 1'b0100000 FIFO is empty Rotary Input Events Rotary has been released Rotary is in position North (N) Rotary is in position NNE Rotary is in position NE Rotary is in position NEE Rotary is in position East (E) Rotary is in position SEE Rotary is in position SE Rotary is in position SSE Rotary is in position South (S) Rotary is in position SSW Rotary is in position SW Rotary is in position SWW Rotary is in position West (W) Rotary is in position NWW Rotary is in position NW Rotary is in position NNW 1 0x00 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 R/W Register Address 0x00 Register Data D7 More Flag D6 Empty Flag D5 D4 D3 D2 D1 D0
1
Overflow Rotary Pad that has been detected as pressed Flag
0
Clear FIFO (D7 - D0 data is don't care; it is not stored)
1
0
0
X
X
X
X
X
1
0
1
X
X
X
X
X
0x00 0 1 0 0 X X X X X
0
0
1
X
X
X
X
X
0
1
0
0
0
0
0
0
1. Reading or writing the MPR08 clears IRQ, IRQ will only be re-asserted by an event after the FIFO has been emptied by read(s).
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Table 11. Fault Register Format
Register Read Fault Register Write Fault Register No faults have been detected on the electrode inputs One or more electrode inputs is detected as shorted to VDD One or more electrode inputs is detected as shorted to VSS 1 R/W 1 0 0x01 Register Address Register Data D7 0 0 X X X D6 0 0 X X X D5 0 0 X X X D4 0 0 X X X D3 0 0 X X X D2 0 0 X X X D1 0 0 0 0 1 D0 Fault 0 0 1 0
Table 12. Current Rotary Register Format
Register Read Current Rotary Status Register Write Current Rotary Status Register Rotary is released or is not enabled Rotary is in position North (N) Rotary is in position NNE Rotary is in position NE Rotary is in position NEE Rotary is in position East (E) Rotary is in position SEE Rotary is in position SE Rotary is in position SSE Rotary is in position South (S) Rotary is in position SSW Rotary is in position SW Rotary is in position SWW Rotary is in position West (W) Rotary is in position NWW Rotary is in position NW Rotary is in position NNW 1 0x02 R/W 1 0 Register Address Register Data D7 0 D6 0 D5 0 D4 D3 D2 D1 D0
Current Rotary Position
A write to this register is ignored, and has no effect 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Table 13. Rotary Configuration Register Format
Register Read Rotary Configuration Register Write Rotary Configuration Register Disable Rotary function entirely Enable Rotary function Disable Rotary touch or press action entering FIFO Enable Rotary touch action entering FIFO as values 1'bxxx10000 through 1'bxxx11111 Disable Rotary release action entering FIFO Enable Rotary released action entering FIFO as value 1'bxxx01111 Rotary touches do not cause the sounder to operate Rotary touches operate the sounder 0x03 X R/W 1 0 Register Address Register Data D7 RotClickEN X X X X X X 0 1 D6 0 X X X X X X X X X D5 0 X X X X X X X X X D4 0 X X X X X X X X X D3 D2 D1 0 X X X X X X X X X D0 RotEN 0 1 X 1 X 1 1 1
RotR RotT X X X X 0 1 X X X X 0 1 X X X X
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Table 14. Sensitivity Register Format
Register Read Number of Position Register Write Number of Position Register Sensitivity setting is level 1 Sensitivity setting is level 2 Sensitivity setting is level 3 Sensitivity setting is level 4 Sensitivity setting is level 5 Sensitivity setting is level 6 Sensitivity setting is level 7 1 0x04 R/W 1 0 Register Address Register Data D7 0 X X X X X X X X D6 0 X X X X X X X X D5 0 Sensitivity Level X X X X X X X X X X X X X X X X X X X X X X 0 0 0 0 1 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 D4 D3 D2 D1 D0
Table 15. Master Tick Period Register Format
Register Data Register Read Master Tick Period Register Write Master Tick Period Register Master Tick Period is 5 ms Master Tick Period is 6 ms Master Tick Period is 7 ms Master Tick Period is 8 ms - all the way through to Master Tick Period is 33 ms Master Tick Period is 34 ms Master Tick Period is 35 ms Master Tick Period is 36 ms X 0x05 R/W 1 0 Register Address D7 0 X X X X X -- X X X X D6 0 X X X X X -- X X X X D5 0 Master Tick X X X X X -- X X X X 0 0 0 0 -- 1 1 1 1 0 0 0 0 -- 1 1 1 1 0 0 0 0 -- 1 1 1 1 0 0 1 1 -- 0 0 1 1 0 1 0 1 -- 0 1 0 1 D4 D3 D2 D1 D0
Table 16. Touch Acquisition Sample Rate Register Format
Register Data Register Touch Acquisition Sample Rate Register Touch acquisition sample rate is 1 master tick period Touch acquisition sample rate is 2 master tick periods Touch acquisition sample rate is 3 master tick periods Touch acquisition sample rate is 4 master tick periods - all the way through to Touch acquisition sample rate is 61 master tick periods Touch acquisition sample rate is 62 master tick periods Touch acquisition sample rate is 63 master tick periods Touch acquisition sample rate is 64 master tick periods 0x06 Register Address D7 0x06 X X X X -- X X X X X X X X -- X X X X D6 D5 D4 D3 D2 D1 D0 Touch Acquisition Sample Rate 0 0 0 0 -- 1 1 1 1 0 0 0 0 -- 1 1 1 1 0 0 0 0 -- 1 1 1 1 0 0 0 0 -- 1 1 1 1 0 0 1 1 -- 0 0 1 1 0 1 0 1 -- 0 1 0 1
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Table 17. Sounder Configuration Register Format
Register Data Register Read Sounder Configuration Register Write Sounder Configuration Register Globally disable sounder output Globally enable sounder output 0x07 Sounder frequency is 1 kHz 1 Sounder frequency is 2 kHz Sounder click period is 10 ms Sounder click period is 20 ms X X X X X X X X X X X X X X X X 0 1 1 X X 1 1 1 X X X X X X 0 1 R/W 1 0 Register Address D7 0 X X X D6 0 X X X D5 0 X X X D4 0 X X X D3 0 SoundD X X X X X X X 0 1 SoundF SoundEN D2 D1 D0
Table 18. Sleep Period Register Format
Register Read Number of Position Register Write Number of Position Register Sleep Mode is disabled, sensor is always running Sleep period is 10 x touch acquisition sample period Sleep period is 20 x touch acquisition sample period Sleep period is 30 x touch acquisition sample period Sleep period is 40 x touch acquisition sample period Sleep period is 50 x touch acquisition sample period Sleep period is 60 x touch acquisition sample period Sleep period is 70 x touch acquisition sample period Sleep period is 80 x touch acquisition sample period Sleep period is 90 x touch acquisition sample period Sleep period is 100 x touch acquisition sample period Idle timeout period is 8 x touch acquisitions sample period Idle timeout period is 16 x touch acquisitions sample period Idle timeout period is 32 x touch acquisitions sample period --all the way through to-- Idle timeout period is 112 x touch acquisitions sample period Idle timeout period is 120 x touch acquisitions sample period 1 0x08 R/W 1 Duration of Sleep Cycle 0 0 X X X X X X X X X X 0 0 0 -- 1 1 0 X X X X X X X X X X 0 0 0 -- 1 1 0 X X X X X X X X X X 0 1 1 -- 1 1 0 X X X X X X X X X X 1 0 1 -- 0 1 0 0 0 0 0 0 0 1 1 1 1 X X X -- X X 0 0 0 1 1 1 1 0 0 0 0 X X X -- X X 0 1 1 0 0 1 1 0 0 1 1 X X X -- X X 0 0 1 0 1 0 1 0 1 0 0 X X X -- X X Register Address Register Data D7 D6 D5 D4 D3 D2 D1 D0
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Table 19. Configuration Register Format
Register Read Configuration Register Write Configuration Register MPR081 is in shutdown, and will not scan the rotary. Note that FIFO contents are not cleared when entering shutdown and can be read any time during shutdown. MPR081 is operating, scanning the rotary, with IRQ interrupt output disabled. Poll the FIFO register 0x00 and/or the Current Rotary register 0x02 to determine current rotary status. Note that FIFO contents are cleared before exiting shutdown MPR081 is operating, scanning the rotary, with IRQ interrupt output enabled. IRQ behavior is controlled by Interrupt Rate bits D5-D7, and is asserted on the first entry into the FIFO from empty. Note that FIFO contents are cleared before exiting shutdown MPR081 will go into low power sleep mode after an idle period timeout. While in low power sleep mode, device cannot be addressed via I2C except by asserting the wake pin. MPR081 will remain awake and can be addressed at anytime via I2C. System reset asserted. MPR081 can be addressed via I2C at anytime. System reset de-asserted. MPR081 can be addressed via I2C at anytime. IRQ interrupt is immediate when FIFO changes from empty IRQ interrupt asserts no sooner than 4 master tick periods after the last IRQ rise IRQ interrupt asserts no sooner than 12 master tick periods after the last IRQ rise IRQ interrupt asserts no sooner than 20 master tick periods after the last IRQ rise IRQ interrupt asserts no sooner than 28 master tick periods after the last IRQ rise IRQ interrupt asserts no sooner than 36 master tick periods after the last IRQ rise IRQ interrupt asserts no sooner than 44 master tick periods after the last IRQ rise IRQ interrupt asserts no sooner than 52 master tick periods after the last IRQ rise 0x09 X X 0 0 0 0 1 1 1 1 X 0 0 1 1 0 0 1 1 X 0 1 0 1 0 1 0 1 1 1 1 1 1 1 1 1 1 X X X X X X X X X X X X X X X X X X 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 X X X X X X 1 0 X X 1 X 1 1 X 1 R/W 1 Interrupt Rate 0 X X X 1 X X X 0 RESET N/A WAKE IRQEN RUN Register Address Register Data D7 D6 D5 D4 D3 D2 D1 D0
X
X
X
1
X
X
0
1
X
X
X
1
X
X
1
1
X
X
X
1
X
0
1
X
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